Based on a large number of experiments, this paper summarized the parameter demands for each module of closed loop control circuit and designed a corresponding hardware circuit using FPGA. The proposed twice closed loop technique improved the zero offset stability of. The main aim of this paper is to present an approach to establish optical fiber communication by employing the standard IEEE 802. 3 Ethernet and Optical Sensing circuits that can be implemented on an FPGA. In this example, a GTX is configured; however almost all details remain the same for other FPGAs in the 7-series family. The example shown here is. Prof., Department of Earth and Space Science and Engineering, York University, 4700 Keele Street, Toronto, ON, M3J 1P3, Canada 3Dr, Department of Earth and Space Science and Engineering, York University, 4700 Keele Street, Toronto, ON, M3J 1P3, Canada E-mail: 1qdsun@ee. ca. We built (in a small team) a 10Mbps fibre optic link for a CUED 3rd year project.
